M31 Technology (M31), a global silicon intellectual property (IP) provider, and Ambiq, a technology leader in ultra-low power semiconductor solutions for edge AI, today announced a joint ultra-low-power Foundation IP solution on the TSMC N12e^® process at TSMC 2026 North America Open Innovation Platform^® (OIP) Ecosystem Forum. The solution brings together an optimized SPSRAM memory compiler and an ultra-low-leakage standard-cell library for Ambiq’s platforms, to help SoC designers meet increasingly stringent power and area budgets for AIoT, wearables, and other always-on edge applications.

As SoC designs incorporate more always-on capability and embedded intelligence, power targets continue to tighten while die-size constraints and tape-out schedules remain unforgiving. Built on TSMC N12e^®, this solution focuses on design-ready Foundation IP that improves energy efficiency while delivering the high performance required for complex AIoT and edge computing workloads.

The Foundation IP includes an TSMC N12e^® ULL (Ultra Low Leakage) SPSRAM memory compiler designed to deliver high density and high performance with extremely low leakage and optimized area, while incorporating essential low-power features such as redundancy, power gating, and BIST. The compiler supports both high-performance and ultra-low-power operation within the same physical memory footprint, enabled by deep co-optimization across circuit design and layout implementation. In low-power mode, its dual-rail architecture achieves close to 500 MHz at near-threshold periphery voltage, while keeping VCCA retention leakage within 1.05-1.1x of the total bit-cell retention leakage. Initial instances have demonstrated strong PPA gains, and full compiler development is ongoing.

Complementing the memory compiler is the TSMC N12e^® standard-cell library from M31, developed to support Ambiq’s platforms and achieving approximately 50% leakage power savings through design-level collaboration with Ambiq, combining Ambiq’s cascade-style approach with M31’s circuit and layout innovations.

Designed to empower next-generation always-on sensing and edge intelligence applications, these Foundation IP deliverables support faster time-to-market and shorter design cycles, maximize energy efficiency through ultra-low-leakage design, and improve cost efficiency by helping reduce die size and minimizing redesign effort.

“Energy efficiency must be a focus starting from the foundation of a system-on-chip, especially as edge devices take on increasingly sophisticated AI workloads,” said Scott Hanson, CTO and Founder of Ambiq. “Our collaboration with M31 brought together complementary low-power design expertise and contributed important building blocks to our next-generation flagship platform in the TSMC N12e^® technology node.”

“Designers are being asked to hit unprecedented energy and area targets while still delivering meaningful compute and responsiveness,” said Jayanta Lahiri, VP at M31. “By combining our high-efficiency memory compiler with standard-cell foundations co-optimized with Ambiq on TSMC N12e^® to support Ambiq’s platforms, we’re enabling customers to achieve aggressive PPA goals with a practical and implementation-friendly Foundation IP solution.”

Looking ahead, M31 will continue expanding its low-power IP portfolio on advanced process nodes while working closely with ecosystem partners to advance high-performance, low-leakage solutions for next-generation Edge AI applications.