M31 Clocking IP
– M31 Ultra-Low Power Fractional PLL IP


Ultra-Low Power Fractional PLL is a general purpose frequency synthesizer with input reference frequency range from 10 to 240 MHz and 3:1 output frequency range. The PLL core is a typical Type-II PLL. The fractional part of the output frequency is achieved by using a programmable 3rd-ord sigma delta modulator. The PLL core operates on core supply voltage with embedded LDO for excellent supply rejection in noisy SoC applications. It is designed for easy usage and simple integration without complex configurations.


  • Supports wide input frequency range: 10MHz ~ 240MHz
  • Supports 2:1 output frequency range allows optimization for power and jitter performance
  • 24 bit fractional accuracy
  • Supports Spread Spectrum Clocking
  • Embedded LDO for excellent supply rejection for noisy SoC environment
  • Lock Detect Signal indicates when frequency lock has been achieved
  • Embedded frequency meter circuit for mass production test
  • Embedded continuous monitoring watchdog circuit for automotive applications
  • Output mux for bypass mode
  • Low Area
    • PLL Core Area less than 100um x 100um
  • Low Power Consumption
    • Less than 1.5mA from core voltage domain at highest output frequency operation
    • Less than 1.0mA from core voltage domain at lowest output frequency operation

Phase Noise Measurement of ULFPLL

Period Jitter Measurement of ULFPLL

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