Over 100 USB, 40 MIPI, 20 PCIe Design Wins
2013 Emerging IP Provider Award by TSMC
2014 Hot Startups to Watch in EE Times Silicon 60 Report
2014 Customers’ Choice Award from TSMC OIP Forum
2014 & 2015 Best IP Partner Award by SMIC
2016 & 2018 & 2019 Specialty IP Partner Award by TSMC
2019 Customers’ Choice Award from TSMC OIP Forum
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Accomplish Your IC
June 4, 2019, “ASPEED Technology is optimistic about the global trend of 360-degree imaging industry. In 2018, it released the world’s first 360-degree image processing chip, Cupola360, which incorporates M31’s low-power D-PHY IP and can be used in travel gatherings, dashboard camera recordings, and home-surveillance. In addition to the consumer application market, in 2019, ASPEED Technology will continue to explore the possibilities of its 360-degree solution for security monitoring and artificial intelligence applications. In the future, we will continue to work closely with M31 to develop more highly competitive SoC solutions.”
May 29, 2019, “The result of partnering two emerging technology leaders, Efinix and M31, is the first FPGA family featuring a MIPI D-PHY with a built-in, royalty-free CSI-2 controller, which is the most popular camera interface used in the mobile industry. Thanks to our technology integration, our customers have more useable logic elements for video, camera, and sensor innovations.”
April 17, 2019, “Embedded Flash technology becomes critical to support a wide range of applications including smart mobile, automotive electronics and the Internet of Things. The collaborative effort combining M31’s IP solutions with TSMC’s 28nm Embedded Flash process technology helps designers to optimize SoCs and achieve a successful balance between speed, area and power consumption.”
October 4, 2018,“TSMC is pleased to recognize M31 for its outstanding IP enablement to TSMC specialty processes. With the advantages of TSMC’s HV and BCD process technologies, M31’s IP are suitable for SoC designs on LCD/LED driver and PMIC power management functions. Customers can develop their products – such as intelligent devices and power management devices – running in different voltage and power conditions.”
October 2nd, 2018, “TSMC’s 28HPC+ ULL memory bit-cell provides further leakage reduction for mainstream smart phones, mobile devices, IoT, audio and SoC applications. The combination of TSMC’s leading 28HPC+ process and M31 IP enables customers to realize the benefits of optimal performance and power in developing their cutting-edge products.”
April 25, 2018, “TSMC has a complete IP ecosystem with four application-specific platforms: Mobile, High-Performance Computing, Automotive, and IoT platforms. TSMC’s 22nm ULP/ULL process technology, and supported IP from M31 Technology, will enable customers to realize heightened benefits of performance and power while designing products on these powerful platforms.”
7 March, 2018, “Technology innovation and quality improvement are Macroblock’s emphasis and commitment to our customers. LED driver ICs are designed to focus on efficiency of low power, high speed, and environment-friendly power saving. M31 low power IP solutions provide all these necessary features and performance, in efficiency, area, reliability, and life cycle for a competitive LED driver IC”.
1st February, 2018,“By again receiving certification for our USB3.1 Gen 2 IP, we have demonstrated strong commitment towards providing quality IP. It also demonstrates our sustained ability to provide complete USB3.1 IP solution to our customer. M31 is delighted again to get our USB3.1 Gen2 PHY IP with Inno-Logic’s USB3.1/2.0 device controller IP certified which was targeted for 28nm HPC+ technology process.
June 15, 2017, “AndesCore™ N705 is well suited for SoC designs on IoT, biomedical, wearable and intelligent home appliances because its architecture was specifically designed to deliver high performance at very low power consumption. With M31’s low-power IP solution and Power Management Kit, it is able to reduce static power consumption by 50% from Clock-Gating mode to State Retention mode, and to reduce additional 75% from State Retention mode to Power-gating mode”.
“Together, the Power Management modes, the Dynamic Voltage and Frequency Scaling (DVFS), the Low Power Cell Libraries and Memories, and N705’s power efficient architecture make possible this impressive advancement for ultra-low power processor implementation. As the requirements for the standby time and the operating time are ever-increasing in each new generation of battery-powered devices, we will continue cooperating on the low power technologies to provide comprehensive solutions for the industry.”